1. Field of the Invention
The preset invention relates to a semiconductor integrated circuit having a capacitor connected between a power source and a ground.
2. Description of the Related Art
Recent semiconductor integrated circuits are of a type in which a circuit for realizing various functions is integrated. FIG. 1 is a diagram for explaining a conventional semiconductor integrated circuit whose main circuit is an A/D (Analog/Digital) converter.
The A/D converter 10 is a circuit that converts an analog signal into a digital signal and has both an analog circuit and a digital circuit therefor. In the A/D converter 10, for example, a power source and a ground are connected to a power source terminal Vdd and a ground terminal GND, respectively, via the wires and the lead frames in the semiconductor integrated circuit 20 on which the A/D converter 10 is mounted so that a power source is supplied. Generally, the power source supplied to the A/D converter 10 from the outside is a stable power source having low output resistance and capable of dealing with even a small variation in internal current.
However, the wires and the lead frames in the semiconductor integrated circuit 20 have inductance L (parasitic inductance). The semiconductor integrated circuit 20 resonates at a specific frequency based on the inductance L and the internal capacity of the A/D converter 10 and varies the potential of the power source terminal Vdd or the ground terminal GND. Resonant frequency fr is expressed by Formula 1 as follows.
                                                        f              r                        =                          1                              2                ⁢                                                                  ⁢                π                ⁢                                                      L                    ⁢                                                                                  ⁢                    C                                                                                ⁢                                          ⁢                      (                                          L                ⁢                                  :                                ⁢                                                                  ⁢                Inductance                            ,                              C                ⁢                                  :                                ⁢                                                                  ⁢                Capacitance                                      )                          ⁢                                                      (                  Formula          ⁢                                          ⁢          1                )            
If this resonant frequency enters the band area of an analog signal, a S/N (Signal-to-Noise) ratio is degraded and a desired characteristic cannot be obtained in the A/D converter 10. Furthermore, if the resonant frequency overlaps the frequency of a digital signal even where it does not enter the band area of the analog signal, a signal is delayed and degraded, thereby causing a malfunction. Besides the resonant frequency, impedance Z generated at that time is also varied based on frequency, inductance, capacity, etc., as expressed by Formula 2 as follows.
                              Z          =                                                                      R                  2                                +                                                      ω                    2                                    ⁢                                      L                    2                                                                                                (                                      1                    -                                                                  ω                        2                                            ⁢                      L                      ⁢                                                                                          ⁢                      C                                                        )                                +                                                      ω                    2                                    ⁢                                      C                    2                                    ⁢                                      R                    2                                                                                      ⁢                                  ⁢                  (                                                                                          L                    ⁢                                          :                                        ⁢                                                                                  ⁢                    Inductance                                    ,                                      C                    ⁢                                          :                                        ⁢                                                                                  ⁢                    Capacitance                                    ,                                                                                                                          R                    ⁢                                          :                                        ⁢                                                                                  ⁢                    Resistance                                    ,                                      ω                    ⁢                                          :                                        ⁢                                                                                  ⁢                    Angular                    ⁢                                                                                  ⁢                    Frequency                                                                                )                                    (                  Formula          ⁢                                          ⁢          2                )            
FIG. 2 is a first graphical representation showing the frequency characteristic of impedance based on different combinations of the capacity and the inductance. The example of FIG. 2 shows the frequency characteristic of the impedance when the inductance increases or decreases with the capacity being constant. According to FIG. 2, as the inductance decreases with the capacity being constant, the resonant frequency is shifted to the high frequency side and the impedance becomes smaller.
FIG. 3 is a second graphical representation showing the frequency characteristic of the impedance based on different combinations of the capacity and the inductance. The example of FIG. 3 shows the frequency characteristic of the impedance when the capacity increases or decreases with the inductance being constant. According to FIG. 3, as the capacity increases with the inductance being constant, the resonant frequency is shifted to the low frequency side and the impedance also becomes smaller.
From the above characteristics, for example, when a parasitic inductance from the power source unit of a circuit to the terminal unit of a package is 20 nH and the capacity between a power source and a ground is 50 pF, the resonant frequency is approximately 160 MHz. This resonant frequency may enter the band area of an analog signal operating at high speed. In this case, the resonant frequency acts as a noise source. Furthermore, when the parasitic inductance is 10 nH and the capacity is 10 pF, the resonant frequency is approximately 500 MHz. This resonant frequency may enter the band area of a digital signal. In this case, the resonant frequency acts as a noise source.
As a technique for preventing such noise, for example, Patent Document 1 describes a semiconductor integrated circuit that reduces a voltage variation occurring in the source of a driver using a variation in the gate voltage of the driver so that data can be transmitted at high speed and accurately. Patent Document 2 describes a semiconductor device that stably maintains voltage on an internal node at a constant level. Patent Document 3 describes a cell-base designed semiconductor integrated circuit device that has capacitor cells arranged in a wiring area using a cell-based design technique to realize a bypass capacitor between power source wiring and GND wiring in a LSI without increasing the chip size and to improve the noise resistance of the LSI.
Although the most effective method of preventing the noise is to make the parasitic inductance zero, the execution of this method is actually impossible. Another method is to make the capacity infinite. With this method, the impedance can be made zero. However, the execution of this method is also impossible. Therefore, the combination of possible values of the inductance and the capacity is actually made so as to find common ground. However, the resonant frequency may enter the band area of a signal depending on the combination. In addition, the frequency characteristic may be significantly degraded depending on impedances.
Patent Document 1: JP-A-11-103248
Patent Document 2: JP-B2-3705842
Patent Document 3: JP-B2-2682397